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 FIN1027 * FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver
April 2001 Revised June 2003
FIN1027 * FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver
General Description
This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data. The FIN1027 or FIN1027A can be paired with its companion receiver, the FIN1028, or with any other LVDS receiver.
Features
s Greater than 600Mbs data rate s 3.3V power supply operation s 0.5ns maximum differential pulse skew s 1.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Meets or exceeds the TIA/EIA-644 LVDS standard s Flow-through pinout simplifies PCB layout s 8-Lead SOIC, US8, and 8-terminal MLP packages save space
Ordering Code:
Order Number FIN1027M FIN1027MX FIN1027K8X FIN1027MPX (Preliminary) FIN1027AM FIN1027AMX Package Number M08A M08A MAB08A MLP08C M08A M08A Package Description 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TUBE] 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TAPE and REEL] 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide [TAPE and REEL] 8-Terminal Molded Leadless Package (MLP) Dual, JEDEC MO-229, 2mm Square [TAPE and REEL] 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TUBE] 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow [TAPE and REEL]
(c) 2003 Fairchild Semiconductor Corporation
DS500501
www.fairchildsemi.com
FIN1027 * FIN1027A
Connection Diagrams
Pin Assignments for SOIC FIN1027 Pin Assignments for US8 for FIN1027
(Top View) Pin Assignments for SOIC FIN1027A
(Top View) Terminal Assignments for MLP FIN1027
(Top Through View)
(Top View)
Pin Descriptions
Pin Name DIN1, DIN2 DOUT1+, DOUT2+ DOUT1-, DOUT2- VCC GND Description LVTTL Data Inputs Non-inverting Driver Outputs Inverting Driver Outputs Power Supply Ground
Function Table
Input DIN L H OPEN
H = HIGH Logic Level L = LOW Logic Level X = Don't Care
Outputs DOUT+ L H L DOUT- H L H
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2
FIN1027 * FIN1027A
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Voltage (DIN) DC Output Voltage (DOUT ) Driver Short Circuit Current (IOSD) Storage Temperature Range (TSTG) Max Junction Temperature (TJ) Lead Temperature (TL) (Soldering, 10 seconds) ESD (Human Body Model) ESD (Machine Model) 260C
-0.5V to +4.6V -0.5V to +6.0V -0.5V to +4.7V
Continuous
Recommended Operating Conditions
Supply Voltage (VCC) Input Voltage (VIN) Operating Temperature (TA) 3.0V to 3.6V 0 to VCC
-40C to +85C
-65C to +150C
150C
6500V 400V
Note 1: The "Absolute Maximum Ratings": are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol VOD VOD VOS VOS IOFF IOS VIH VIL IIN II(OFF) VIK ICC CIN COUT Parameter Output Differential Voltage VOD Magnitude Change from Differential LOW-to-HIGH Offset Voltage Offset Magnitude Change from Differential LOW-to-HIGH Power Off Output Current Short Circuit Output Current Input HIGH Voltage Input LOW Voltage Input Current Power-Off Input Current Input Clamp Voltage Power Supply Current Input Capacitance Output Capacitance VIN = 0V or VCC VCC = 0V, VIN = 0V or 3.6V IIK = -18 mA No Load, VIN = 0V or VCC RL = 100 , VIN = 0V or VCC 4 6 -1.5 12.5 17.0 VCC = 0V, VOUT = 0V or 3.6V VOUT = 0V VOD = 0V 2.0 GND RL = 100 , See Figure 1 1.125 1.25 Test Conditions Min 250 Typ (Note 2) 350 450 25 1.375 25 20 -8 8 VCC 0.8 20 20 Max Units mV mV V mV A mA V V A A V mA mA pF pF
Note 2: All typical values are at TA = 25C and with VCC = 3.3V.
3
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FIN1027 * FIN1027A
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol tPLHD tPHLD tTLHD tTHLD tSK(P) tSK(LH), tSK(HL) tSK(PP) Parameter Differential Propagation Delay LOW-to-HIGH Differential Propagation Delay HIGH-to-LOW Differential Output Rise Time (20% to 80%) RL = 100 , CL = 10pF, Differential Output Fall Time (80% to 20%) Pulse Skew |tPLH - tPHL| Channel-to-Channel Skew (Note 4) Part-to-Part Skew (Note 5) See Figure 2 and Figure 3 Test Conditions Min Typ (Note 3) 0.5 0.5 0.4 0.4 1.5 1.5 1.0 1.0 0.5 0.3 1.0 Max Units ns ns ns ns ns ns ns
Note 3: All typical values are at TA = 25C and with VCC = 3.3V. Note 4: tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direction. Note 5: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Note A: All input pulses have frequency = 10 MHz, tR or tF = 2 ns Note B: C L includes all probe and fixture capacitances
FIGURE 1. Differential Driver DC Test Circuit
FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit
FIGURE 3. AC Waveforms
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4
FIN1027 * FIN1027A
DC / AC Typical Performance Curves
FIGURE 4. Output High Voltage vs. Power Supply Voltage
FIGURE 5. Output Low Voltage vs. Power Supply Voltage
FIGURE 6. Output Short Circuit Current vs. Power Supply Voltage
FIGURE 7. Differential Output Voltage vs. Power Supply Voltage
FIGURE 8. Differential Output Voltage vs. Load Resistor
FIGURE 9. Offset Voltage vs. Power Supply Voltage
5
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FIN1027 * FIN1027A
DC / AC Typical Performance Curves
(Continued)
FIGURE 10. Power Supply Current vs. Frequency
FIGURE 11. Power Supply Current vs. Power Supply Voltage
FIGURE 12. Power Supply Current vs. Ambient Temperature
FIGURE 13. Differential Propagation Delay vs. Power Supply
FIGURE 14. Differential Propagation Delay vs. Ambient Temperature
FIGURE 15. Differential Skew (tPLH - tPHL) vs. Power Supply
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6
FIN1027 * FIN1027A
DC / AC Typical Performance Curves
(Continued)
FIGURE 16. Differential Pulse Skew (tPLH - tPHL) vs. Ambient Temperature
FIGURE 17. Transition Time vs. Power Supply Voltage
FIGURE 18. Transition Time vs. Ambient Temperature
7
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FIN1027 * FIN1027A
Tape and Reel Specification
TAPE FORMAT for US8 Package Designator K8X Tape Section Leader (Start End) Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) Number Cavities 125 (typ) 250 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed
REEL DIMENSIONS inches (millimeters)
Tape Size 8 mm
A 7.0 (177.8)
B 0.059 (1.50)
C 0.512 (13.00)
D 0.795 (20.20)
N 2.165 (55.00)
W1 0.331 + 0.059/-0.000 (8.40 + 1.50/-0.00)
W2 0.567 (14.40)
W3 W1 + 0.078/-0.039 (W1 + 2.00/-1.00)
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8
FIN1027 * FIN1027A
Tape and Reel Specification
TAPE FORMAT for MLP Ao Bo Package 0.10 0.10 2x2 2.30 2.30 D D1 Min 1.0 E F Ko P1 TYP 8.0 Po TYP 4.0 P2 T TYP 0.3 TC W Wc TYP 5.3
0.05
1.55
0.1
1.75
0.1
3.5
0.1
1.0
0/05
2.0
0.005
0.06
0.3
8.0
MLP Embossed Tape Dimensions (Dimensions are in millimeters)
REEL DIMENSIONS (millimeters)
Tape Width 8 mm
Dia A Max 330
Dim B Min 1.5
Dia C +0.5/-0.2 13
Dia D Min 20.2
Dim N Min 178
Dim W1 +2/-0 8.4
Dim W2 Max 14.4
Dim W3 (LSL - USL) 7.9 10.4
9
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FIN1027 * FIN1027A
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M08A
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10
FIN1027 * FIN1027A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package Number MAB08A
11
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FIN1027 * FIN1027A 3.3V LVDS 2-Bit High Speed Differential Driver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Terminal Molded Leadless Package (MLP) Dual, JEDEC MO-229, 2mm Square Package Number MLP08C (Preliminary)
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 12 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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